Topic: Emerging Architectures

LLNL is participating in the 33rd annual Supercomputing Conference (SC21), which will be held both virtually and in St. Louis on November 14–19, 2021.

In experiments performed at the University of Wisconsin-Madison, researchers found that fluctuations in the electrical charge of multiple quantum bits (qubits) can be highly correlated. The team also linked tiny error-causing perturbations in the qubits’ charge state to the absorption of cosmic rays.

The latest issue of LLNL's Science & Technology Review magazine showcases Computing in the cover story alongside a commentary by Bruce Hendrickson.

In his opening keynote address at the AI Systems Summit, LLNL CTO Bronis de Supinski described integration of two AI-specific systems to achieve system level heterogeneity.

CTO Bronis de Supinski discusses the integrated storage strategy of the future El Capitan exascale supercomputing system, which will have in excess of 2 exaflops of raw computing power spread across nodes.

A near node local storage innovation called Rabbit factored heavily into LLNL’s decision to select Cray’s proposal for its CORAL-2 machine, the lab’s first exascale-class supercomputer, El Capitan.

Proxy apps serve as specific targets for testing and simulation without the time, effort, and expertise that porting or changing most production codes would require.

The Next Platform's Nicole Hemsoth writes that LLNL's addition of new hardware kept us at the front of the supercomputing news cycle throughout most of the year.

LLNL’s Computing Directorate heads to the 32nd annual Supercomputing Conference (SC20) held virtually on November 9–19. Although the format is different this year, we’re turning out in full force.

LLNL participates in the 32nd annual Supercomputing Conference (SC20) held virtually on November 9–19, 2020.

LLNL has installed a new AI accelerator into the Corona supercomputer, allowing researchers to run simulations while offloading AI calculations from those simulations to the AI system.

Livermore Computing's CTO Bronis de Supinski discusses the Lab's early work with, and vision for, the Cerebras-Lassen hardware integration.

LLNL and Cerebras Systems have installed the company’s AI computer into Lassen, making LLNL the first institution to integrate the cutting-edge AI platform with a supercomputer.

Highlights include response to the COVID-19 pandemic, high-order matrix-free algorithms, and managing memory spaces.

With its advanced CPUs/GPUs developed by AMD, El Capitan’s peak performance is expected to exceed 2 exaflops, which would make it the fastest supercomputer in the world when it is deployed in 2023.

The HPCwire Editors’ and Readers’ Choice awards for Top Supercomputing Achievement recognized Cray, LLNL, and two other labs for developing the first U.S. exascale-class supercomputers.

LLNL’s Computing Directorate will descend upon the 2019 Supercomputing Conference. Find us at tutorials, workshops, panels, poster/paper sessions (with a Best Paper finalist), and the Job Fair.

LLNL heads to the 31st annual Supercomputing Conference (SC19) in Denver, Colorado, on November 17–22, 2019.

The NNSA’s first exascale supercomputer, El Capitan, will have a peak performance of more than 1.5 exaflops (1.5 quintillion calculations per second) and an anticipated delivery in late 2022.

LLNL’s brain-on-a-chip may offer an effective way to evaluate the organ’s response to threats. Data analytics and HPC modeling help scientists better understand neuronal networks.

Next-generation computing systems are projected to surpass the speed of today's supercomputers by 5–10 times. This article explains OpenMP-relevant initiatives under the Exascale Computing Project.

Not only is LLNL home to some of the world's most powerful supercomputers, we've also built test beds for quantum computing.

LLNL's Advanced Simulation Computing program formed the Advanced Architecture and Portability Specialists team to help LLNL code teams identify and implement optimal porting strategies.

Livermore computer scientists have helped create a flexible framework that aids programmers in creating source code that can be used effectively on multiple hardware architectures.

A new, complex memory/storage hierarchy is emerging, with persistent memories offering greatly expanded capacity, and augmented by DRAM/SRAM cache and scratchpads to mitigate latency.