Topic: Performance, Portability, and Productivity

LLNL’s Python 3–based ATS tool provides scientific code teams with automated regression testing across HPC architectures.

Distinguished Member of Technical Staff Kathryn Mohror advances the state of the art in I/O and data management and serves as a leader within the greater HPC community.

LLNL participates in the ISC High Performance Conference (ISC24) on June 10–13.

A new just-in-time compilation approach leverages LLVM intermediate representation to optimize GPU kernels with portability to any GPU architecture.

Research recognized at the HiPC IEEE conference proposes using an optimized version of OpenMP for vendor-agnostic GPU performance, portability, and scalability.

Over the next three years, CASC researchers and collaborators will integrate LLMs into HPC software to boost performance and sustainability.

The latest issue of LLNL's magazine explains how the world’s most powerful supercomputer helps scientists safeguard the U.S. nuclear stockpile.

LLNL is participating in the 36th annual Supercomputing Conference (SC24) in Atlanta on November 17–22, 2024.

The Association for Computing Machinery's (ACM) Special Interest Group on High Performance Computing (SIGHPC) has awarded Kathryn Mohror with its prestigious Emerging Woman Leader in Technical Computing (EWLTC) Award.

Two LLNL teams have come up with ingenious solutions to a few of the more vexing difficulties. For their efforts, they’ve won awards coveted by scientists in the technology fields.

Collecting variants in low-level hardware features across multiple GPU and CPU architectures.

Discover how the software architecture and storage systems that will drive El Capitan’s performance will help LLNL and the NNSA Tri-Labs push the boundaries of computational science.

LLNL participates in the ISC High Performance Conference (ISC24) on May 12–16.

LLNL researchers have achieved a milestone in accelerating and adding features to complex multiphysics simulations run on GPUs, a development that could advance HPC and engineering.

The Tools Working Group delivers debugging, correctness, and performance analysis solutions at an unprecedented scale.

LLNL is participating in the 35th annual Supercomputing Conference (SC23), which will be held both virtually and in Denver on November 12–17, 2023.

The Center for Efficient Exascale Discretizations has developed innovative mathematical algorithms for the DOE’s next generation of supercomputers.

Siting a supercomputer requires close coordination of hardware, software, applications, and Livermore Computing facilities.

Combining specialized software tools with heterogeneous HPC hardware requires an intelligent workflow performance optimization strategy.

Highlights include MFEM community workshops, compiler co-design, HPC standards committees, and AI/ML for national security.

LLNL is participating in the 34th annual Supercomputing Conference (SC22), which will be held both virtually and in Dallas on November 13–18, 2022.

LLNL participates in the ISC High Performance Conference (ISC22) on May 29 through June 2.

The MAPP incorporates multiple software packages into one integrated code so that multiphysics simulation codes can perform at scale on present and future supercomputers.

Highlights include power grid challenges, performance analysis, complex boundary conditions, and a novel multiscale modeling approach.

A Livermore-developed programming approach helps software to run on different platforms without major disruption to the source code.