Distinguished Member of Technical Staff Kathryn Mohror advances the state of the art in I/O and data management and serves as a leader within the greater HPC community.
Topic: Fault Tolerance and Resilience
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The Association for Computing Machinery's (ACM) Special Interest Group on High Performance Computing (SIGHPC) has awarded Kathryn Mohror with its prestigious Emerging Woman Leader in Technical Computing (EWLTC) Award.
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With SCR, jobs run more efficiently, recover more work upon failure, and reduce load on critical shared resources.
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Bugs, broken codes, or system failures require added time for troubleshooting and increase the risk of data loss. LLNL has addressed failure recovery by developing the Scalable Checkpoint/Restart (SCR) framework.
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Our researchers will be well represented at the virtual SIAM Conference on Computational Science and Engineering (CSE21) on March 1–5. SIAM is the Society for Industrial and Applied Mathematics with an international community of more than 14,500 individual members.
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Algorithms at Scale | Computational Math | Computational Science | Data Science | Deep Learning | Discrete Mathematics | Exascale | Fault Tolerance and Resilience | HPC Systems and Software | PDE Methods | Performance, Portability, and Productivity | Programming Languages and Models | UQ and Statistics
Highlights include recent LDRD projects, Livermore Tomography Tools, our work with the open-source software community, fault recovery, and CEED.
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AI/ML | Co-Design | Computational Math | Computational Science | Data Science | Deep Learning | Discrete Mathematics | Exascale | Fault Tolerance and Resilience | HPC Architectures | HPC Systems and Software | Hybrid/Heterogeneous | Open-Source Software | Resource and Workflow Management | Software Build and Installation
“If applications don’t read and write files in an efficient manner,” system software developer Elsa Gonsiorowski warns, “entire systems can crash.”
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Application-level resilience is emerging as an alternative to traditional fault tolerance approaches because it provides fault tolerance at a lower cost than traditional approaches.
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Working on world-class supercomputers at a U.S. national laboratory was not what Edgar Leon, a native of Mexico, envisioned when he began preparing for university.
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These techniques emulate the behavior of anticipated future architectures on current machines to improve performance modeling and evaluation.
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